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resolve RIP in some x86 fp semantics - #1637

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resolve RIP in some x86 fp semantics#1637
Angs12 wants to merge 44 commits into
BinaryAnalysisPlatform:masterfrom
Angs12:master

Commits on Oct 23, 2026
- x86: resolve RIP-relative addresses
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  committed
  fc5b5e3
- x86: add instruction length and fix PC resolution
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  36db150
- x86: add symbolic immediates to the lifter
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  20922e0
- opt: restore the optimization pass cache
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  543dc5f
- x86: add symbolic immediates for mov and lea
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  02f8363
- x86: tag RIP-relative addresses before resolution
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  c2120f2
- build: migrate to OCaml 5.3 and Jane Street 0.17
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  1a81e7b
- x86: fix SHUFPS and add PSHUFLW/PSHUFHW
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  committed
  b1d1fd6
- x86: use tablegen names for PSHUFLW/PSHUFHW
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  ac301d4
- test: correct the pshuflw/pshufhw encodings
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  375ae5a
- disasm: retain conflict-tolerant semantics reads
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  4b97e04
- x86: match the MCInst operand count for CVT*2SI
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  977e23f
- x86: index8 registers are aliases, not bases
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  e12aeb2
- x86: fix swapped widths in the scalar fconvert rows
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  80d13c3
- x86: add the missing CVTSD2SSrm_Int definition
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  5c7380a
- x86: register the core-theory flag roles on the status flags
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  beef405
- dune: -O3 in the release profile too
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  2b007f8
- elf: the RELATIVE relocation fact carries its addend
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  6b5510f
- llvm: use the ELF relocation's own addend
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  8e91ebb
- llvm: declare the addend table in the loader scheme
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  530d1ff
- disasm: expose run_in_scope
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  841e559
- disasm: publish Recursive.global_cfg
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  097b0cd
- x86: mark locked RMW and implicit xchg
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  committed
  8f90fa9
- llvm: expose ELF program-header type and alignment in Ogre
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  committed
  806c5f6
- x86: decode byte xadd and preserve destination operand order
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  committed
  9918e63
- x86: decode byte xchg and cmpxchg in the exchange family
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  committed
  b4ed831
- x86: give byte exchange one lifter owner across backend modes
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  committed
  20cb9be
- x86: return cmpxchg8b low and high halves in EAX and EDX
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  committed
  648a3a4
- x86: honor REX.B in accumulator exchange opcode 90
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  committed
  0399207
- x86: emit explicit atomic intrinsics with captured operands
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  committed
  61c0f15
- x86: alias the R8-R15 sub-registers onto their 64-bit parents
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  3e35d3c
- x86: declare remaining operand registers and EIP addressing
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  committed
  61d733d
- x86: convert the 32-bit source of CVTSI2SS/CVTSI2SD
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  committed
  299c15b
- x86: fix the SSE compare and conversion forms
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  committed
  3609abd
- x86: MINSD/MAXSD write only the low double
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  committed
  eded678
- x86: add SSE compare, min/max, and sqrt semantics
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  committed
  d41a6eb
- x86: address memory operands as base + index*scale + disp
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  committed
  1c35d7a
- x86: assign div and idiv quotient and remainder registers directly
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  committed
  045f3d6
- bap: join instruction properties monotonically
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  committed
  99c72bb
- bap: preserve memory-typed indirect jump targets
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  committed
  b991bc5
- bap: resume a decode from given addresses
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  committed
  6905aab
Commits on Oct 24, 2026
- nix flake
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  committed
  f3382e5
Commits on Oct 25, 2026
- x86: add x87 semantics as intrinsics
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  committed
  a9505f2
- bap: store multi-chunk words in byte order
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  committed
  dcdf42b

Commits

Commits on Oct 23, 2026

Commits on Oct 24, 2026

Commits on Oct 25, 2026