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Move restoreDispatchTableReg and computePc to MacroAssembler #653

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Merged
titzer merged 2 commits into from
Jun 30, 2026
Merged

Move restoreDispatchTableReg and computePc to MacroAssembler #653

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f96c8a0
Move restoreDispatchTableReg and computePc to MacroAssembler
matthew-mojira Jun 17, 2026
358a4a0
Restore `restoreDispatchTableReg`
matthew-mojira Jun 30, 2026
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1 change: 1 addition & 0 deletions src/engine/compiler/MacroAssembler.v3
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Original file line number Diff line number Diff line change
Expand Up @@ -315,6 +315,7 @@ class MacroAssembler(valuerep: Tagging, regConfig: RegConfig) {
def emit_save_ivar(reg: Reg);
def emit_spill_ivar(reg: Reg);
def emit_restore_ivar(reg: Reg);
def emit_compute_pc(delta: int);

def emit_pop_r(kind: ValueKind, reg: Reg);
def emit_ret();
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11 changes: 2 additions & 9 deletions src/engine/x86-64/X86_64Interpreter.v3
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Expand Up @@ -1232,7 +1232,7 @@ class X86_64InterpreterGen(ic: X86_64InterpreterCode, w: DataWriter) {
endHandler();
// TierUp triggered; call runtime
asm.bind(tierup);
computePc(-1);
masm.emit_compute_pc(-1);
masm.emit_get_curstack(xenv.tmp3);
saveCallerIVars();
asm.movq_r_m(r_tmp1, m_wasm_func);
Expand Down Expand Up @@ -3676,10 +3676,7 @@ class X86_64InterpreterGen(ic: X86_64InterpreterCode, w: DataWriter) {
masm.emit_restore_ivar(xenv.vfp);
}
def restoreDispatchTableReg() {
if (!FeatureDisable.globalProbes) {
// restore dispatch table from Interpreter.dispatchTable
asm.movq_r_m(r_dispatch, masm.absPointer(offsets.Interpreter_dispatchTable));
}
if (!FeatureDisable.globalProbes) masm.emit_restore_dispatch_table_reg(xenv.dispatch);
}
def callRuntime(abs: Pointer, args: Array<X86_64Gpr>, canTrap: bool) {
masm.emit_save_ivar(xenv.vsp);
Expand Down Expand Up @@ -4156,10 +4153,6 @@ class X86_64InterpreterGen(ic: X86_64InterpreterCode, w: DataWriter) {
def computePcFromCurIp() {
if (!FeatureDisable.stacktraces) asm.q.sub_r_m(r_curpc, m_code);
}
def computePc(delta: int) {
asm.q.lea(r_curpc, X86_64Addr.new(r_ip, null, 1, delta - offsets.Array_contents));
asm.q.sub_r_m(r_curpc, m_code);
}
// All traps are generated out-of-line and call into the runtime.
def genTraps() {
w.atEnd();
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9 changes: 9 additions & 0 deletions src/engine/x86-64/X86_64MacroAssembler.v3
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Expand Up @@ -999,6 +999,15 @@ class X86_64MacroAssembler extends MacroAssembler {
var offsets = getOffsets();
asm.movq_r_m(G(reg), absPointer(offsets.Interpreter_dispatchTable));
}
def emit_restore_dispatch_table_reg(reg: Reg) {
asm.movq_r_m(G(reg), absPointer(getOffsets().Interpreter_dispatchTable));
}
def emit_compute_pc(delta: int) {
def r_ip = G(INT_EXEC_ENV.ip), r_curpc = G(INT_EXEC_ENV.curpc);
def m_code = R.RSP.plus(X86_64InterpreterFrame.code.offset);
asm.q.lea(r_curpc, X86_64Addr.new(r_ip, null, 1, delta - getOffsets().Array_contents));
asm.q.sub_r_m(r_curpc, m_code);
}
def emit_i32_clz_r_r(r: X86_64Gpr, s: X86_64Gpr) {
asm.movd_r_i(scratch, -1);
asm.d.bsr_r_r(r, s);
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