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408 changes: 408 additions & 0 deletions Multiprotocol/MC8RE_a7105.ino

Large diffs are not rendered by default.

6 changes: 5 additions & 1 deletion Multiprotocol/Multi_Protos.ino
Original file line number Diff line number Diff line change
Expand Up @@ -96,6 +96,7 @@ const char STR_RLINK[] ="RadLink";
const char STR_REALACC[] ="Realacc";
const char STR_OMP[] ="OMP";
const char STR_MLINK[] ="M-Link";
const char STR_MC8RE[] ="MC8RE V2";
const char STR_TEST[] ="Test";
const char STR_NANORF[] ="NanoRF";
const char STR_E016HV2[] ="E016Hv2";
Expand Down Expand Up @@ -433,7 +434,10 @@ const mm_protocol_definition multi_protocols[] = {
{PROTO_MLINK, STR_MLINK, NO_SUBTYPE, 0, OPTION_NONE, 1, 0, SW_CYRF, MLINK_init, MLINK_callback },
#endif
#if defined(XK_CCNRF_INO)
{PROTO_MOFLY, STR_MOFLY, NO_SUBTYPE, 0, OPTION_RFTUNE, 0, 0, SW_NRF, XK_init, XK_callback },
{PROTO_MOFLY, STR_MOFLY, NO_SUBTYPE, 0, OPTION_RFTUNE, 0, 0, SW_NRF, XK_init, XK_callback },
#endif
#if defined(MC8RE_A7105_INO)
{PROTO_MC8RE, STR_MC8RE, NO_SUBTYPE, 0, OPTION_NONE, 0, 0, SW_A7105, MC8RE_init, MC8RE_callback },
#endif
#if defined(MOULDKG_NRF24L01_INO)
{PROTO_MOULDKG, STR_MOULDKG, STR_SUBTYPE_MOULDKG, 3, OPTION_OPTION, 0, 0, SW_NRF, MOULDKG_init, MOULDKG_callback },
Expand Down
6 changes: 6 additions & 0 deletions Multiprotocol/Multiprotocol.h
Original file line number Diff line number Diff line change
Expand Up @@ -137,6 +137,7 @@ enum PROTOCOLS
PROTO_WPL = 107, // =>NRF24L01
PROTO_ARES = 108, // =>CC2500
PROTO_MOFLY = 109, // =>CC2500 & NRF24L01
PROTO_MC8RE = 110, // =>A7105

PROTO_NANORF = 126, // =>NRF24L01
PROTO_TEST = 127, // =>CC2500
Expand Down Expand Up @@ -597,6 +598,11 @@ enum MultiPacketTypes
MULTI_TELEMETRY_RLINK = 18,
};

#if defined(MC8RE_A7105_INO)
void MC8RE_init();
uint16_t MC8RE_callback();
#endif

// Macros
#define NOP() __asm__ __volatile__("nop")

Expand Down
12 changes: 12 additions & 0 deletions Multiprotocol/Telemetry.ino
Original file line number Diff line number Diff line change
Expand Up @@ -326,6 +326,18 @@ static void multi_send_status()

static void multi_send_frskyhub()
{
#if defined(MC8RE_A7105_INO)
/* MC8RE V2 provides only A1/A2 plus the FrSky-D link marker. A short
* frame intentionally prevents EdgeTX from creating synthetic link
* quality telemetry fields that this receiver does not transmit. */
if(protocol == PROTO_MC8RE && frame[0] == 0xFE)
{
multi_send_header(MULTI_TELEMETRY_HUB, 4);
for(uint8_t i = 0; i < 4; i++)
Serial_write(frame[i]);
return;
}
#endif
multi_send_header(MULTI_TELEMETRY_HUB, 9);
for (uint8_t i = 0; i < 9; i++)
Serial_write(frame[i]);
Expand Down
2 changes: 2 additions & 0 deletions Multiprotocol/Validate.h
Original file line number Diff line number Diff line change
Expand Up @@ -257,6 +257,7 @@
#undef HUBSAN_A7105_INO
#undef JOYSWAY_A7105_INO
#undef KYOSHO_A7105_INO
#undef MC8RE_A7105_INO
#undef PELIKAN_A7105_INO
#undef WFLY2_A7105_INO
#endif
Expand Down Expand Up @@ -418,6 +419,7 @@
#undef BUGS_A7105_INO
#undef HEIGHT_A7105_INO
#undef HUBSAN_A7105_INO
#undef MC8RE_A7105_INO
#undef E010R5_CYRF6936_INO
#undef E01X_CYRF6936_INO
#undef E129_CYRF6936_INO
Expand Down
1 change: 1 addition & 0 deletions Multiprotocol/_Config.h
Original file line number Diff line number Diff line change
Expand Up @@ -186,6 +186,7 @@
#define HUBSAN_A7105_INO
#define JOYSWAY_A7105_INO
#define KYOSHO_A7105_INO
#define MC8RE_A7105_INO
#define PELIKAN_A7105_INO
#define WFLY2_A7105_INO

Expand Down
15 changes: 15 additions & 0 deletions Protocols_Details.md
Original file line number Diff line number Diff line change
Expand Up @@ -127,6 +127,7 @@ CFlie|AIR|38|CFlie||||||||NRF24L01|
[MJXq](Protocols_Details.md#MJXQ---18)||18|WLH08|X600|X800|H26D|E010*|H26WH|PHOENIX*||NRF24L01|XN297
[MLINK](Protocols_Details.md#MLINK---78)||78|||||||||CYRF6936|
[MoFly](Protocols_Details.md#MoFly---109)||109|||||||||NRF24L01&CC2500|XN297
[MC8RE V2](Protocols_Details.md#MC8RE-V2---110)|AIR|110|||||||||A7105|
[MouldKg](Protocols_Details.md#mouldkg---90)||90|A4444|D4444|A664||||||NRF24L01|XN297
[MT99xx](Protocols_Details.md#MT99XX---17)||17|MT|H7|YZ|LS|FY805|A180|DRAGON|F949G|NRF24L01|XN297
[MT99xx2](Protocols_Details.md#MT99XX2---92)||92|PA18|SU35|||||||NRF24L01|XN297
Expand Down Expand Up @@ -381,6 +382,20 @@ A|E|T|R|CH5|CH6

RX output will match the Hype standard AETR independently of the input configuration AETR, RETA... unless on OpenTX 2.3.3+ you use the "Disable channel mapping" feature on the GUI.

## MC8RE V2 - *110*

MC8RE V2 receiver family. Bind from the transmitter GUI, then set A1 to the
receiver/BEC voltage and A2 to the external battery voltage. Set A2's ratio
to 25.5 V for a 4S voltage range.

This protocol is fixed to the capture-proven transmitter identity and hopping
sequence. It is not yet a universal implementation for transmitters with a
different original identity; see [MC8RE_V2.md](docs/MC8RE_V2.md).

CH1|CH2|CH3|CH4|CH5|CH6|CH7|CH8
---|---|---|---|---|---|---|---
A|E|T|R|CH5|CH6|CH7|CH8

## Pelikan - *60*
Extended limits supported

Expand Down
68 changes: 68 additions & 0 deletions docs/MC8RE_V2.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,68 @@
# MC8RE V2 (A7105)

This protocol supports the MC8RE V2 receiver family using an A7105 RF chip.
It was reconstructed from a wired A7105 SPI capture of the original
transmitter and then verified on two MC8RE V2 receivers.

## Implemented behaviour

- bind sequence: six packets on A7105 ID `5475C52A`, channel
`01`, then normal operation on ID `51D567EB`;
- 16-channel hopping and the original startup/RX slot timing captured from
the transmitter;
- eight 11-bit packed output channels with linear scaling: EdgeTX
-100%/0%/+100% maps to nominal PWM 1000/1500/2000 us (wire
500/1000/1500). Extended -125%/+125% reaches nominal 875/2125 us
(wire 375/1625). v1.3.4.77 uses a single slope throughout;
- telemetry A1 (receiver/BEC voltage) and A2 (external battery voltage,
0.1 V per count; set EdgeTX A2 ratio to 25.5 V for a 4S range);
- a relative local A7105 RSSI indication. It is not a calibrated received
signal-strength measurement supplied by the receiver.

## PWM mapping and receiver measurements

The v1.3.4.74 PWM mapping is based on Session 3 receiver CH1 measurements
with v1.3.4.73 (approximately 858/1523/2187 us at minimum/neutral/maximum).
Session 4 verified v1.3.4.74 CH1 at approximately 1000/1499–1500/1998 us.
The v1.3.4.76 extended-range test preserves the standard mapping within
+/-100% and stretches only the outer 100–125% segments to nominal
500–2500 us. A subsequent +/-125% capture measured receiver CH1 at
499.042/1500.125/2499.208 us (minimum/neutral/maximum). Median PWM period
was 14.001167 ms. This capture contained 538 complete pulses, including
58 stable minimum pulses and 44 stable maximum pulses. Logic D7 was
connected directly to receiver CH1; sampling rate was 24 MHz.

These are receiver CH1 PWM measurements. All eight channel fields use the
same encoder, but other receiver channels have not been measured individually.
The extended-range capture did not separately hold +/-100% positions;
those were measured on the preceding standard-range build. No simultaneous
SPI traffic was recorded in these PWM captures.

The current v1.3.4.77 mapping replaces the earlier piecewise expansion with
one linear mapping: serial 0..2047 -> wire 375..1625, rounded to the
nearest count. EdgeTX serial values 205/1024/1843 at -100%/0%/+100%
map to wire 500/1000/1500. The nominal extended PWM range is now
875–2125 us. New hardware measurements are pending; the measurements
above describe the preceding builds, not the new extended endpoint values.

For the full range, enable EdgeTX Extended Limits, keep mixer weight at
100%, and set output limits to -125%/+125% with zero trim/subtrim/offset.
Confirm the channel monitor reaches +/-125%. MULTI serial input saturates
at that range. Values above +/-125% do not extend the received serial range.

## Known limitation

The normal link ID and hopping sequence are intentionally fixed to the
capture-proven transmitter identity `51D567EB`. Another original
transmitter has been observed to use a different ID and hopping sequence.
Deriving only the low 24 bits from the EdgeTX receiver number bound briefly
but did not maintain control, so it is deliberately not exposed as an option.
This is why this change is suitable for a **Draft PR / request for more
captures**, rather than a claim of universal MC8RE compatibility.

## Reproduction evidence

The contributor can provide the original Saleae `.sal` wired capture on
request. Its SPI settings are CPOL=0, CPHA=0, MSB first; A7105 CS, SCK,
MOSI and MISO were captured. No receiver serial output or third-party RF
packet decoder was used to infer the normal-channel format.