perf(decoder): mirror the destuff-once positional MagSgn reader to NEON and WASM#458
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…ON and WASM Apply the same reader redesign as the AVX2 commit to the NEON and WASM-SIMD fwd_buf classes: the constructor destuffs the whole MagSgn segment once into a per-thread scratch buffer, fetch()/fetch_raw() return the 128 bits at an absolute bit position (two staggered 8-byte loads shifted into alignment), and advance() becomes an integer add with the same >=128-bit fail-fast range check. The destuff pass itself is a new shared portable scalar implementation (destuff_fwd_portable): 16 source bytes per iteration in the common no-0xFF case, detected with the branch-free has-value bit trick on two 64-bit words, falling back to a per-byte bit accumulator only for chunks that contain 0xFF. The x86 class keeps its SSE variant of the same algorithm. ISA notes: WASM shift counts are modulo 64, so the fetch carry lanes are masked when (pos & 7) == 0; NEON USHL yields 0 for out-of-range counts, so no special case is needed there. WASM-SIMD (Zen 5 host, Node 24, single-thread, min-of-15 in-process, same-moment A/B, 3840x2160 fixtures): 8-bit lossless 105.9 ms -> 98.6 ms (-6.9%) 8-bit lossy 153.3 ms -> 135.4 ms (-11.7%) NEON is expected to behave like the other two ISAs (identical reader structure) but was not perf-measured here (no ARM hardware); CI's ARM runners validate correctness. Decoded output is pixel-byte-identical to the native reference on all four fixtures through the new WASM-SIMD build, and the native suite passes 463/463. The scalar fwd_buf is deliberately left unchanged: its reader is already a single Creg shift per advance, so a destuff pass would only add cost (the Lever-1 lesson). Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01M9cKpzqghsLxJUu7kkyRAw
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Continuation of #457, which was auto-closed when its stacked base branch (#456's
perf/decode-step2-posreader) was deleted after merging. Same branch, now rebased ontomain(single commit on top of the merged #456).What
Applies the same MagSgn reader redesign as #456 to the NEON and WASM-SIMD
fwd_bufclasses: destuff the whole segment once in the constructor (per-thread scratch), fetch at absolute bit positions with no serial reader state, and reduceadvance()to an integer add with the same ≥128-bit fail-fast range check.The destuff pass is a new shared portable scalar implementation (
destuff_fwd_portable): 16 source bytes per iteration in the common no-0xFF case (branch-free has-value bit trick on two 64-bit words), per-byte bit accumulator only for chunks containing 0xFF. The x86 class keeps its SSE variant of the same algorithm.ISA-specific care:
(pos & 7) == 0.USHLyields 0 for out-of-range shift counts, so no special case is needed.fwd_bufis deliberately untouched: its reader is already a singleCreg >>= nper advance, so a destuff pass would only add cost — the same structural reason the earlier VLC destuff experiment regressed.Results
WASM-SIMD, Node 24 on Zen 5, single-thread, min-of-15 in-process iterations, same-moment A/B, 3840×2160 fixtures:
NEON has the identical reader structure and is expected to behave the same, but was not perf-measured here (no ARM hardware available); the ARM CI runners validate correctness, and an Apple-silicon measurement is a follow-up.
Correctness
🤖 Generated with Claude Code
https://claude.ai/code/session_01M9cKpzqghsLxJUu7kkyRAw