From f450c0c46b846a7b8e533d1bfe4f8b61045c4cac Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 22 Apr 2026 13:33:25 +0100 Subject: [PATCH] media: imx708: Support configuring continuous clock from DT The driver was always using non-continuous clock mode. Add support for selecting continuous clock mode as well. Signed-off-by: Dave Stevenson --- drivers/media/i2c/imx708.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/media/i2c/imx708.c b/drivers/media/i2c/imx708.c index 6ab38e6a30e567..23af2f3f08bfaf 100644 --- a/drivers/media/i2c/imx708.c +++ b/drivers/media/i2c/imx708.c @@ -112,6 +112,9 @@ MODULE_PARM_DESC(qbc_adjust, "Quad Bayer broken line correction strength [0,2-5] #define IMX708_REG_MID_ANALOG_GAIN 0x3118 #define IMX708_REG_SHT_ANALOG_GAIN 0x0216 +#define IMX708_REG_CLKLANE_BLANK 0x3220 +#define IMX708_CLKLANE_BLANK_NONCONT BIT(0) + /* QBC Re-mosaic broken line correction registers */ #define IMX708_LPF_INTENSITY_EN 0xC428 #define IMX708_LPF_INTENSITY_ENABLED 0x00 @@ -866,6 +869,8 @@ struct imx708 { unsigned int long_exp_shift; unsigned int link_freq_idx; + + unsigned int csi_flags; }; static inline struct imx708 *to_imx708(struct v4l2_subdev *_sd) @@ -1499,6 +1504,16 @@ static int imx708_start_streaming(struct imx708 *imx708) return ret; } + ret = imx708_write_reg(imx708, IMX708_REG_CLKLANE_BLANK, + IMX708_REG_VALUE_08BIT, + imx708->csi_flags & V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK ? + IMX708_CLKLANE_BLANK_NONCONT : 0); + if (ret) { + dev_err(&client->dev, "%s failed to set clock lane mode\n", + __func__); + return ret; + } + ret = imx708_read_reg(imx708, IMX708_REG_BASE_SPC_GAINS_L, IMX708_REG_VALUE_08BIT, &val); if (ret == 0 && val == 0x40) { @@ -1972,6 +1987,8 @@ static int imx708_check_hwcfg(struct device *dev, struct imx708 *imx708) goto error_out; } + imx708->csi_flags = ep_cfg.bus.mipi_csi2.flags; + ret = 0; error_out: