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Add the Apple Silicon M4 bare-metal plan
The target is this machine: Mac16,10 / J773gAP / t8132. Records the full SoC map read out of its own Apple Device Tree, and settles three claims that the public record gets wrong. SPTM does not block a third-party kernel. Apple ships two boot modes on M4; the raw boot object mode still hands off at EL2 with the MMU off. What SPTM broke is the reverse-engineering tooling, since XNU can no longer be virtualised under m1n1. m1n1 already runs on an M4 Mac mini and AsahiLinux/linux carries t8132-j773g.dts for this exact model. The actual blockers are U-Boot, which has no t8132 case and so provides no UEFI, and the Asahi installer, which cannot build a stub because no IPSW old enough exists for this board. Both force direct m1n1 to kernel entry over the Linux boot protocol, which is the kernel.bin lane the Pi 500+ work already built. Measured, and not published elsewhere: AIC v3 with its register layout derived from the 0x4A00 die stride (max_irq = 4096) and an iack offset of 0x40000 that independently matches Asahi's own t8132.dtsi; ethernet as a BCM57762 that bge(4) already drives; and SPTM's presence in the boot chain. Corrects the folklore on three points: 16K pages are not required, as OpenBSD and NetBSD both run 4K on Apple silicon; AICv3 already exists under ISC in OpenBSD; and the console is DebugUSB/KIS rather than SBU serial. Costs the critical path at ~3,100 lines, ~2,900 copyable under ISC or MIT, with NVMe root avoiding the IOMMU because ANS sits behind SART rather than DART. Planning only. Nothing has been installed on the machine and no boot policy has been changed.
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