sim: CUDA/HIP drop timing constraints + events — `--timing-report`/`--timing-summary`/`--timed` are Metal-only

[robtaylor]

Summary

On the sim path, timing-violation detection and reporting work only on the
Metal backend. CUDA and HIP silently produce no timing output: the
timing_constraints buffer is accepted by sim_cuda/sim_hip and then
dropped on the floor, and no EventBuffer / process_events pass runs.

So under --features cuda or --features hip:

• --timing-report <json> → writes nothing
• --timing-summary → prints nothing
• --timed output VCD → timing arrivals stay zero
• symbolic violation messages (WordSymbolMap) → absent

The gap is Rust-side wiring only — the kernel work is already done

This is not missing kernel code:

• The unified kernel simulate_v1_noninteractive_simple_scan
  (csrc/kernel_v1_impl.cuh) already reads timing_constraints and writes
  the EventBuffer when those pointers are non-null.
• The C entry points simulate_v1_noninteractive_timed_cuda
  (csrc/kernel_v1.cu:49) and simulate_v1_noninteractive_timed_hip
  (csrc/kernel_v1.hip.cpp:70) already exist, pass both through, and are
  bindgen-exposed to Rust.

The only gap: sim_cuda (src/bin/jacquard.rs:1163) and sim_hip
(src/bin/jacquard.rs:1332) call the ..._simple_scan binding, whose C
wrapper hardcodes timing_constraints = nullptr / event_buffer = nullptr
(kernel_v1.cu:31-32). They never call the ..._timed binding, never
allocate an EventBuffer, never run process_events.

Proposed fix

1. Lift the backend-agnostic post-kernel logic out of sim_metal
   (src/bin/jacquard.rs:1016-1106: process_events loop, ReportingCtx,
   ReportBuilder, report JSON/summary finalize) into a shared helper.
2. In sim_cuda/sim_hip: allocate an EventBuffer, pass
   timing_constraints via the ..._timed binding, and call the shared
   post-kernel helper. Give both sim_cuda/sim_hip the report_cfg
   argument that sim_metal already takes.
3. (Stretch) replace the post-sim CPU scan for assertions/$display with the
   live event-buffer path now that the buffer exists, unifying behaviour.

Blocked on

Implementable now, but untestable in CI until the NVIDIA / AMD self-hosted
runners are online (CUDA/HIP CI jobs are currently if: ${{ false }} in
.github/workflows/ci.yml).

Context

Surfaced while scoping the v0.1.0 Metal-first release (ADR 0018). Documented
loosely in docs/release-process.md ("sim_cuda / sim_hip accept
timing_constraints but currently call the simple-scan path") and the
CHANGELOG "Known limitations". This issue is the precise, verified version.

Filed from a backend-parity audit (Claude Code).

[robtaylor]

Companion: #105 tracks the much larger cosim-on-CUDA/HIP gap from the same backend-parity audit. This issue (#104) is the small, kernel-already-done sim timing-wiring half.